# Lab Report 8 (1)

.pdf

*keyboard_arrow_up*

School

Texas A&M University *

*We aren’t endorsed by this school

Course

248

Subject

Electrical Engineering

Date

Dec 6, 2023

Type

Pages

4

Uploaded by ElderBatPerson616 on coursehero.com

Your preview ends here

Eager to read complete document? Join bartleby learn and gain access to the full version

- Access to all documents
- Unlimited textbook solutions
- 24/7 expert homework help

Related Questions

From the following truth table:
i) Construct Karnaugh Map (SOP)ii) Design combinational logic circuit using 2-input NAND Gateiii) Design combinational logic circuit using 4:1 Multiplexer

*arrow_forward*

Detecting and detecting 010011 sequence in binary information received from an external input line xFor sequential logic circuit that makes external z output 1 when it does; a) Create the state diagram. Explain how you created it. b) Create the situation table. Note: D flip-flops are used in this circuit. If not used in the status tableif there are cases, you can specify the next state values and output as neutral values.

*arrow_forward*

VII. ASSESSMENT
Analyzed and compute the following combinational logic gates and formulate the logic diagram and truth table.
Find:
Simplified the algebraic expression to the given output from Figure
Form a truth table
What is the canonical form in sum of products and simplified the value of algebraic expression.
What is the canonical form in products of sum
Formulate the value in KMAP

*arrow_forward*

3.) Logic Function F(x,y,z,w) =∑ m(0,2,4,6,8,13) + ∑ k(10,12) is given as the sum of miniterms. (Note: There are terms that are ignored.)
a. Obtain the Truth Table.
b. Simplify with the Karnough Map approach.
NS. Implement the simplified Logic circuit with only two-input AND-NOT (NAND) gates. How many apples did you use, please comment.

*arrow_forward*

3) Logic Function F (x, y, z, w) = ∑ m (0,2,4,6,10,13) + ∑ k (8,12) as sum of minimers is given
a) Obtain the Truth Table.
b) Simplify with the Karnough Map approach.
c) Draw the simplified Logic circuit with two input AND-NOT (NAND) gates. With how many apples you realized, what is your gain? Comment.

*arrow_forward*

Analyse, optimise and enhance a sequential logic circuit, making use of Timing Diagrams
pls answer in typing. Thanks

*arrow_forward*

For the sequential logic circuit that detects the 010011 sequence from binary information received from an external input line x and makes the external z output 1 when detected
A)create the situation diagram. Describe how it was created
B)
create the situation chart

*arrow_forward*

Create a schematic diagram and Truth Table for a logic circuit that is made up entirely of NAND gates of the given below:The scenario involves a circuit that has an alarm system, which activates a buzzer whenever both the power and at least one of the two sensors are turned on. It is important to note that the sensors will only function if an enable pin is activated.

*arrow_forward*

Design of a digital electronic circuit that produces 4 bits of binary numbers sequentially and repeatedly to move the Stepper Motor in Full Step mode such as : 0011 1001 1100 0110 0011. To generate predefined binary data, You can use a flip-flop that is assembled into a Sync Counter. To stringing a flip-flop into a Sync Counter must be known Excitation Table or Table Transition from flip-flop. Citation Table determined by Table The Truth of the Flip-Flop.
Design of Synchronous Counter circuit to generate 4 bits of Motor drive data Stepper on Full Step mode using a D flip-flop?

*arrow_forward*

Design a combinational logic circuit that converts a three-bit binary number from code A to code B, according to the table on the right. Answer the following questions:
Code A
Code B
000
000
001
001
011
010
010
011
110
100
111
101
101
110
100
111
Construct the truth table for the circuit.

*arrow_forward*

Assume a three-story hospital is built at Expo Center Karachi, and you are hired to design the logic circuit for the newly installed lift. The lift only stops at Ground, Second, Third Floors.
The lift has one button (RUN), that can be turned into Up or Down position.
When the switch is turned to the UP position (i.e. R=1), the lift goes upward from the Ground floor (i.e. 0) to the top floor (i.e. 3), and if the switch is turned to the DOWN position (i.e. R=0) it will go downward.
Design this synchronous sequential circuit for this up-down counter using the JK-flip- flops.
Perform all design steps, including state-diagram,
state-table, K-map, minimized expressions
and finally, the draw the logic circuit.

*arrow_forward*

There are 5 gates in a metrobus, 1 of which is to get on and 4 to get off. The number of passengers inside is desired to be seen on the LCD connected to the P2 port. Get-on gate is controlled by the P0.2 while get-off gates are controlled by the P0.3, P0.4, P0.5, and P0.6. The sensors generate Logic-1 while passing passengers. Since the passenger carrying capacity of the metrobus is 294, if the number of passengers exceeds the number of 294, the warning LED connected to the P0.7 pin is required to light up. Since other pins of P0 are used for other purposes, it is not desired to be changed.
Can you write the answer with assembly code using 8051 - AT89S8253 architecture?

*arrow_forward*

Design a combinational logic circuit that converts a three-bit binary number from code A to code B, according to the table on the right. Answer the following questions:
Code A
Code B
000
000
100
001
110
010
010
011
011
100
001
101
101
110
111
111
Implement your circuit using two 2-by-4 decoders (with enables) only. Explain your implementation. You can use as many ‘OR’ gates and inverters as you need.
Implement your circuit using 4-by-1 multiplexers and the fewest number of additional logic gates (if needed). Provide the complete implementation.

*arrow_forward*

Design a combinational circuit with four inputs and one output. The output is 1, when the binary value of the input is less than or equal to 3, the output is zero otherwise. The output is 1 when the binary value of the input is a prime number greater than 9.a) Obtain the truth table.b) Find the simplified output function in sum of products. c) Draw the logic diagram using NOR gates only. ……

*arrow_forward*

Design a circuit with logic gates that tell us if a number less than 10, codedin binary, it is either prime (1) or not (0). Minimum up to 16 combinations.True tableII. Boolean functionIII. Simplification procedure by any of the methods

*arrow_forward*

) A new manufacturing plant which operates on parameters such as temperature
and pressure, has been procured by your company. In the operational manual is
stated “if one or more than one parameter exceeds the safe value, a protective
measure is needed to be done”. As an engineer, design a schematic diagram using
an OR gate to detect the exceed parameter and explain how it will produce a
command signal for the system to take the required action.
Major Topic 12
Basic logic gates & its application
AN

*arrow_forward*

Draw a block diagram, truth table and logic circuit of 1*16 Demultiplexer and explain its working principle.

*arrow_forward*

An electronic system will only operate if three switches A, B and C are correctly set. An output signal (X = 1) will occur if A and B are both in the ON position or if A is in the OFF position and B and C are both in the ON position. Design a logic circuit to represent the above situation and draw the truth table and Karnaugh diagram

*arrow_forward*

Fill in the truth table below. Draw the Karnaugh map and show it in its simplest form. Draw the logic circuit. running state = 0 fault state = 1 please fast

*arrow_forward*

SEE MORE QUESTIONS

Recommended textbooks for you

Related Questions

From the following truth table:
i) Construct Karnaugh Map (SOP)ii) Design combinational logic circuit using 2-input NAND Gateiii) Design combinational logic circuit using 4:1 Multiplexer

*arrow_forward*

Detecting and detecting 010011 sequence in binary information received from an external input line xFor sequential logic circuit that makes external z output 1 when it does; a) Create the state diagram. Explain how you created it. b) Create the situation table. Note: D flip-flops are used in this circuit. If not used in the status tableif there are cases, you can specify the next state values and output as neutral values.

*arrow_forward*

VII. ASSESSMENT
Analyzed and compute the following combinational logic gates and formulate the logic diagram and truth table.
Find:
Simplified the algebraic expression to the given output from Figure
Form a truth table
What is the canonical form in sum of products and simplified the value of algebraic expression.
What is the canonical form in products of sum
Formulate the value in KMAP

*arrow_forward*

3.) Logic Function F(x,y,z,w) =∑ m(0,2,4,6,8,13) + ∑ k(10,12) is given as the sum of miniterms. (Note: There are terms that are ignored.)
a. Obtain the Truth Table.
b. Simplify with the Karnough Map approach.
NS. Implement the simplified Logic circuit with only two-input AND-NOT (NAND) gates. How many apples did you use, please comment.

*arrow_forward*

3) Logic Function F (x, y, z, w) = ∑ m (0,2,4,6,10,13) + ∑ k (8,12) as sum of minimers is given
a) Obtain the Truth Table.
b) Simplify with the Karnough Map approach.
c) Draw the simplified Logic circuit with two input AND-NOT (NAND) gates. With how many apples you realized, what is your gain? Comment.

*arrow_forward*

Analyse, optimise and enhance a sequential logic circuit, making use of Timing Diagrams
pls answer in typing. Thanks

*arrow_forward*

For the sequential logic circuit that detects the 010011 sequence from binary information received from an external input line x and makes the external z output 1 when detected
A)create the situation diagram. Describe how it was created
B)
create the situation chart

*arrow_forward*

Create a schematic diagram and Truth Table for a logic circuit that is made up entirely of NAND gates of the given below:The scenario involves a circuit that has an alarm system, which activates a buzzer whenever both the power and at least one of the two sensors are turned on. It is important to note that the sensors will only function if an enable pin is activated.

*arrow_forward*

Design of a digital electronic circuit that produces 4 bits of binary numbers sequentially and repeatedly to move the Stepper Motor in Full Step mode such as : 0011 1001 1100 0110 0011. To generate predefined binary data, You can use a flip-flop that is assembled into a Sync Counter. To stringing a flip-flop into a Sync Counter must be known Excitation Table or Table Transition from flip-flop. Citation Table determined by Table The Truth of the Flip-Flop.
Design of Synchronous Counter circuit to generate 4 bits of Motor drive data Stepper on Full Step mode using a D flip-flop?

*arrow_forward*

Design a combinational logic circuit that converts a three-bit binary number from code A to code B, according to the table on the right. Answer the following questions:
Code A
Code B
000
000
001
001
011
010
010
011
110
100
111
101
101
110
100
111
Construct the truth table for the circuit.

*arrow_forward*

Assume a three-story hospital is built at Expo Center Karachi, and you are hired to design the logic circuit for the newly installed lift. The lift only stops at Ground, Second, Third Floors.
The lift has one button (RUN), that can be turned into Up or Down position.
When the switch is turned to the UP position (i.e. R=1), the lift goes upward from the Ground floor (i.e. 0) to the top floor (i.e. 3), and if the switch is turned to the DOWN position (i.e. R=0) it will go downward.
Design this synchronous sequential circuit for this up-down counter using the JK-flip- flops.
Perform all design steps, including state-diagram,
state-table, K-map, minimized expressions
and finally, the draw the logic circuit.

*arrow_forward*

There are 5 gates in a metrobus, 1 of which is to get on and 4 to get off. The number of passengers inside is desired to be seen on the LCD connected to the P2 port. Get-on gate is controlled by the P0.2 while get-off gates are controlled by the P0.3, P0.4, P0.5, and P0.6. The sensors generate Logic-1 while passing passengers. Since the passenger carrying capacity of the metrobus is 294, if the number of passengers exceeds the number of 294, the warning LED connected to the P0.7 pin is required to light up. Since other pins of P0 are used for other purposes, it is not desired to be changed.
Can you write the answer with assembly code using 8051 - AT89S8253 architecture?

*arrow_forward*

*arrow_back_ios*

- SEE MORE QUESTIONS

*arrow_forward_ios*

Recommended textbooks for you